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| Division | Item | Specification |
| FPGA Part | Target FPGA | XC3S200-PQ208 |
| PROM | XCF01S-VO20 | |
| Clocks | 54MHz(Default) Socket Clock |
|
| Memory | SDRAM | K4S561632J-TC75(16M x 16bit) / 133MHz |
| Display | LED | User LED 4bit |
| 7-Segment | 7-Segment 2-Digit | |
| Switch | Push Switch | Reset Switch, User Switch x 4EA |
| DIP Switch | User DIP Switch 4bit | |
| Video | DAC | 10Bit-DAC, 180-MSPS/RGB 8:8:8 |
| Download | USB | Circuit bilt-in for Xilinx Platform Download Cable |
| PC Interface | UART | 1Ch |
| Expansion Port | Exp A | User I/O : 36Pin |
| Terasic Module interface -purpose | ||
| Option Board Interface-purpose : On using cable | ||
| Exp B | User I/O : 25Pin | |
| Option Board Interface-purpose | ||
| Exp C | User I/O : 26Pin | |
| Option Board Interface-purpose |
