| Item |
Specification |
Details |
| FPGA |
XC7V2000T-FLG1925C |
Logic cell: 1,954,560 |
| Memory |
DDR3 SO-DIMM |
Density: 2GByte (up to 8GByte) |
| BPI Configuration Flash |
Density: 64MByte (JS28F512P30TF) |
| Async-SRAM |
Density: 2MByte / Access time: 15ns |
| Connectivity |
UART |
UART 1-Port (RS232C) |
| Clock |
User Clock |
Single ended: 100MHz (Main)
Differential: 125MHzx1ea ,200MHz x1ea
User clock |
| |
VITA 57 based FMC Total: 160 I/Os
- 8 GTXs Transceiver / 4 GTXs Clocks
- 2 Differential clock |
| Expansion Port |
FMC Port |
Exp_X, Y, Z Total: 612 I/Os
(8 GTXs Transceiver, 4 GTXs Clock) |
| Expansion port |
2CH (Resolution: 12Bit) |
| AMS ADC |
XADC Port |
User LED 8-bits |
| LED |
Discrete LED |
+5V(AC to DC Adapter appllied) |
| Switches |
DIP Switch, Push Switch |
Reset Switch 1 Input |
| Reset Switch |
|
| User Select I/O |
|
1.2V, 1.35V,1.5V,1.8V (Differential I/O support) |
| Power |
DC-Input |
DC +5V |
| Size |
H x V x D |
180mm x 155mm x 40mm |