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| Division | Item | Specification | Details |
| Hardware | FPGA | XC5VSX50T-1FF1136 (Default) | |
| LX class : LX50T, LX85T, LX110T, LX155T | |||
| SX class : SX50T, SX95T | |||
| FX class : FX70T, FX100T | |||
| Clocks | Clock 100Mhz (Default) : 0~255 division possible | ||
| Gaga-bit Ethernet (10/100/1000 BASE-T) | |||
| high speed I/O device | PCI Express 8-lane | ||
| Strata-Flash (8M X 16) | |||
| SFP Connector | |||
| Memory device | DDR2 SO-DIMM (64M X 64) | ||
| ZBT-SRAM (128K X 36) | |||
| Strata-Flash (8M X 16) | |||
| SPI-Flash (2MB) | |||
| Display device | Discrete LED 8bit | ||
| 7-Segment 6 Digit | |||
| Switch | Reset Switch User PUSH Switch X 4EAUser DIP Switch 8bit |
||
| Audio device | AD1981B (AC97 Codec) | ||
| Video device | ADC : AD9887A | Video ADC/DAC Resolution 1600X1200(Max) |
|
| DAC : TFP410PAP, ADV7123JSTZ50 | |||
| PC Interface | USB 2.0 Host & Peripheral RS-232C 2-Channel |
||
| Expansion Port | Exp-A, B : 34Pin X 2-Port | ||
| Exp-C, D : 132Pin X 2-Port (LX50T, LX58T, SX50T not supported) |
LVDS supported | ||
| External Clock | Input : 1EA Output : 1EA |
LVDS25 | |
| Software | Design tool | Xilinx ISE Foundation (Full Option honest commodity) System Generator |
Donation to university's purchaser |
| MATLAB/Simulink Modelsim Xilinx Edition) |
Extra purchase | ||
| Option board | Camera | CMOS Camera (5M pixel) | Expansion A,B Port used |
| high speed ADC/DAC | ADC (14 bit-65Msps, 2-Ch) DAC (14 bit-400Msps, 2-Ch) |
||
| ADC/DAC Board | ADC (8 Bit-10Ksps, 1-Ch) DAC (8 Bit-1Msps, 1-Ch) |
||
| TFT-LCD | 7"800 X 480 |
