Information
105 Geumil-ro 965beon-gil, Samseong-myeon, Eumseong, Chungcheongbuk-do, South Korea
+82 43-879-3043
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Overview
- Summary
- Nepes, established in 1990, is a specialized system semiconductor post-processing company, offering advanced Wafer Level Packaging (WLP) turnkey services, including 8-inch and 12-inch flip-chip bumping and testing. The company's main business areas include semiconductor packaging and testing, as well as electronic materials for semiconductor and display manufacturing. It is a leading innovator, having commercialized high-value-added advanced packaging technologies such as Fan-Out Wafer Level Package (FO-WLP) and Fan-Out Panel Level Packaging (FO-PLP for the first time in Korea. Nepes leads the market by providing next-generation packaging solutions to meet the growing demand for high-performance semiconductors in mobile, automotive, and artificial intelligence (AI) sectors.Nepes, established in 1990, is a specialized system semiconductor post-processing company, offering advanced Wafer Level Packaging (WLP) turnkey services, including 8-inch and 12-inch flip-chip bumping and testing. The company's main business areas include semiconductor packaging and testing, as well as electronic materials for semiconductor and display manufacturing. It is a leading innovator, having commercialized high-value-added advanced packaging technologies such as Fan-Out Wafer Level Package (FO-WLP) and Fan-Out Panel Level Packaging (FO-PLP for the first time in Korea. Nepes leads the market by providing next-generation packaging solutions to meet the growing demand for high-performance semiconductors in mobile, automotive, and artificial intelligence (AI) sectors.
- Key Products/Technologies
- **Wafer Level Packaging (WLP)**: An advanced packaging technology involving bumping and redistribution layer (RDL) processes on the final processed wafer. Nepes was the first in Korea to successfully mass-produce wafer bumping, offering 8-inch and 12-inch wafer services.**Wafer Level Packaging (WLP)**: An advanced packaging technology involving bumping and redistribution layer (RDL) processes on the final processed wafer. Nepes was the first in Korea to successfully mass-produce wafer bumping, offering 8-inch and 12-inch wafer services.
- **Fan-Out Wafer Level Packaging (FO-WLP)**: A technology that expands the package size beyond the chip to place I/O terminals externally, increasing the number of I/Os. This technology reduces chip thickness and improves heat dissipation efficiency and signal transmission speed, applied in mobile application processors (APs) and automotive semiconductors.**Fan-Out Wafer Level Packaging (FO-WLP)**: A technology that expands the package size beyond the chip to place I/O terminals externally, increasing the number of I/Os. This technology reduces chip thickness and improves heat dissipation efficiency and signal transmission speed, applied in mobile application processors (APs) and automotive semiconductors.
- **Fan-Out Panel Level Packaging (FO-PLP)**: A technology that processes FO packages on square panels instead of traditional round wafers, improving productivity by over 120%. Notably, it is the world's first to apply 600mm large square panel FO-PLP mass production technology, achieving approximately 5 times the processing capacity compared to 300mm round panels.**Fan-Out Panel Level Packaging (FO-PLP)**: A technology that processes FO packages on square panels instead of traditional round wafers, improving productivity by over 120%. Notably, it is the world's first to apply 600mm large square panel FO-PLP mass production technology, achieving approximately 5 times the processing capacity compared to 300mm round panels.
- **2.5D and 3D Packaging Technologies**: Next-generation packaging technologies targeting high-performance computing (HPC) and AI semiconductor markets, utilizing RDL interposers and silicon bridges to address the chiplet market. These technologies integrate multiple semiconductor dies horizontally or vertically to enhance data processing speed and power efficiency.**2.5D and 3D Packaging Technologies**: Next-generation packaging technologies targeting high-performance computing (HPC) and AI semiconductor markets, utilizing RDL interposers and silicon bridges to address the chiplet market. These technologies integrate multiple semiconductor dies horizontally or vertically to enhance data processing speed and power efficiency.
- **Power Management IC (PMIC) Packaging**: Initiated mass production of PMIC packaging for AI chipsets, supplying to HPC and automotive AI chipset markets. The company is investing to expand its 8-inch and 12-inch PMIC packaging production capacity.**Power Management IC (PMIC) Packaging**: Initiated mass production of PMIC packaging for AI chipsets, supplying to HPC and automotive AI chipset markets. The company is investing to expand its 8-inch and 12-inch PMIC packaging production capacity.
- Core Advantages
- **Leadership in Advanced Packaging Technology**: Possesses unique technological capabilities, being the first in Korea to commercialize Fan-Out Wafer Level Package (FO-WLP) and Fan-Out Panel Level Packaging (FO-PLP) technologies. Operates a system semiconductor packaging foundry fab capable of mass-producing the world's largest 600mm FO-PLP.**Leadership in Advanced Packaging Technology**: Possesses unique technological capabilities, being the first in Korea to commercialize Fan-Out Wafer Level Package (FO-WLP) and Fan-Out Panel Level Packaging (FO-PLP) technologies. Operates a system semiconductor packaging foundry fab capable of mass-producing the world's largest 600mm FO-PLP.
- **Provision of Turnkey Solutions**: Offers comprehensive turnkey services, including 8-inch and 12-inch flip-chip bumping and testing, enhancing customer convenience and efficiency. This signifies integrated services across the entire semiconductor post-processing spectrum.**Provision of Turnkey Solutions**: Offers comprehensive turnkey services, including 8-inch and 12-inch flip-chip bumping and testing, enhancing customer convenience and efficiency. This signifies integrated services across the entire semiconductor post-processing spectrum.
- **Global Customer Base and Market Expansion**: Secures major domestic and international fabless companies and large semiconductor design firms as clients, including Samsung Electronics, SK Hynix, LG Display, and Qualcomm. Recognized by the White House as one of the top 10 semiconductor companies with core manufacturing technology globally.**Global Customer Base and Market Expansion**: Secures major domestic and international fabless companies and large semiconductor design firms as clients, including Samsung Electronics, SK Hynix, LG Display, and Qualcomm. Recognized by the White House as one of the top 10 semiconductor companies with core manufacturing technology globally.
- **AI and High-Performance Semiconductor Response Capabilities**: Actively developing and commercializing 2.5D and PoP (Package on Package) packaging technologies essential for high-performance and high-density chipsets in AI semiconductors, HPC, and automotive applications, strengthening future market competitiveness.**AI and High-Performance Semiconductor Response Capabilities**: Actively developing and commercializing 2.5D and PoP (Package on Package) packaging technologies essential for high-performance and high-density chipsets in AI semiconductors, HPC, and automotive applications, strengthening future market competitiveness.
- **Cost Competitiveness**: Achieves significant cost reduction and improved productivity through PLP process technology compared to conventional WLP. This advantage stems from its large-scale production capacity using large square panels.**Cost Competitiveness**: Achieves significant cost reduction and improved productivity through PLP process technology compared to conventional WLP. This advantage stems from its large-scale production capacity using large square panels.
- **Continuous R&D Investment and Technological Innovation**: Recognized for its technological prowess, having pioneered the localization of semiconductor developers and commercialized various advanced packaging technologies such as WLP, FOWLP, and PLP. Strengthens its competitiveness through the acquisition of advanced packaging technology and production facilities from Deca Technologies in the US.**Continuous R&D Investment and Technological Innovation**: Recognized for its technological prowess, having pioneered the localization of semiconductor developers and commercialized various advanced packaging technologies such as WLP, FOWLP, and PLP. Strengthens its competitiveness through the acquisition of advanced packaging technology and production facilities from Deca Technologies in the US.
- Target Industrie
- Mobile devices (smartphones, wearable devices)Mobile devices (smartphones, wearable devices)
- Automotive (automotive electronics, autonomous driving, ADAS, automotive semiconductors)Automotive (automotive electronics, autonomous driving, ADAS, automotive semiconductors)
- Artificial Intelligence (AI) semiconductors and serversArtificial Intelligence (AI) semiconductors and servers
- High-Performance Computing (HPC)High-Performance Computing (HPC)
- Internet of Things (IoT)Internet of Things (IoT)
- Display (display driver ICs)Display (display driver ICs)
- Medical equipment and hearing aidsMedical equipment and hearing aids
- Major Markets
- South Korea, China, JapanSouth Korea, China, Japan
- EuropeEurope
- United StatesUnited States
- Certifications/Patents
- US patent acquisition for semiconductor solder bumping technology in 2004US patent acquisition for semiconductor solder bumping technology in 2004
- Wafer Level Package (WLP) technology selected as 'Next-Generation World-Class Product' in 2016, upgraded to 'Current World-Class Product' in 2023Wafer Level Package (WLP) technology selected as 'Next-Generation World-Class Product' in 2016, upgraded to 'Current World-Class Product' in 2023
- Selected as one of the 'Top 10 Semiconductor Companies with Core Technology' by the US White House in 2021Selected as one of the 'Top 10 Semiconductor Companies with Core Technology' by the US White House in 2021
- Selected as one of the 'Top 10 Lighthouse Companies' by the Ministry of Trade, Industry and Energy in 2022Selected as one of the 'Top 10 Lighthouse Companies' by the Ministry of Trade, Industry and Energy in 2022
- Joined the UCIe (Universal Chiplet Interconnect Express) Consortium in 2022Joined the UCIe (Universal Chiplet Interconnect Express) Consortium in 2022
- Selected for the 'Innovation Premier 1000' in 2025 (Semiconductor & Display sector by the Ministry of Trade, Industry and Energy)Selected for the 'Innovation Premier 1000' in 2025 (Semiconductor & Display sector by the Ministry of Trade, Industry and Energy)
Introduction
Location
105 Geumil-ro 965beon-gil, Samseong-myeon, Eumseong, Chungcheongbuk-do, South Korea
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