LB Semicon is a specialized outsourced semiconductor assembly and test (OSAT) company providing bumping, probe test, back-end processes, and WLCSP services for semiconductor chips such as DDI, CIS, and PMIC used in electronic devices. The company is a pioneer in Korea, being the first to initiate flip-chip wafer bumping operations. Recently, it has expanded its business into AI semiconductor packaging, enhancing its capabilities in advanced packaging solutions. It maintains strong partnerships with leading domestic and international semiconductor manufacturers, solidifying its position in the global marketLBSemiconisaspecializedoutsourcedsemiconductorassemblyandtest(OSAT)companyprovidingbumping,probetest,back-endprocesses,andWLCSPservicesforsemiconductorchipssuchasDDI,CIS,andPMICusedinelectronicdevices.ThecompanyisapioneerinKorea,beingthefirsttoinitiateflip-chipwaferbumpingoperations.Recently,ithasexpandeditsbusinessintoAIsemiconductorpackaging,enhancingitscapabilitiesinadvancedpackagingsolutions.Itmaintainsstrongpartnershipswithleadingdomesticandinternationalsemiconductormanufacturers,solidifyingitspositionintheglobalmarket
Key Products/TechnologiesKeyProducts/Technologies
Bumping: Gold bumping for TFT LCD & OLED Display Driver IC (DDI), Solder bumping, and Cu pillar bumping technologies. Cu pillar bumping technology for fine pitches (40um or smaller). RDL (Redistribution Layer) process enabling flip-chip packages for wafers not originally designed for them. Solder bump solutions applied to various flip-chip packages like COC, fcBGA, and fcQFNBumping:GoldbumpingforTFTLCD&OLEDDisplayDriverIC(DDI),Solderbumping,andCupillarbumpingtechnologies.Cupillarbumpingtechnologyforfinepitches(40umorsmaller).RDL(RedistributionLayer)processenablingflip-chippackagesforwafersnotoriginallydesignedforthem.Solderbumpsolutionsappliedtovariousflip-chippackageslikeCOC,fcBGA,andfcQFN
Probe Test: Wafer test services for DDI, CIS, PMIC, AP (Application Processor), and SoC (System on Chip), performing electrical performance and quality inspections. Possessing the largest number of probe testers in Korea for extensive testing capabilities. Electrical Die Sorting (EDS) process for pre-sorting defective chips, improving efficiency of subsequent processesProbeTest:WafertestservicesforDDI,CIS,PMIC,AP(ApplicationProcessor),andSoC(SystemonChip),performingelectricalperformanceandqualityinspections.PossessingthelargestnumberofprobetestersinKoreaforextensivetestingcapabilities.ElectricalDieSorting(EDS)processforpre-sortingdefectivechips,improvingefficiencyofsubsequentprocesses
Back-end Process: Services including laminating, back grinding, laser marking and grooving, SAW, plasma, Post AVI, UV irradiation, pick and place, AVI, visual inspection, and packing. Wafer thinning (minimum 30um) and backside metal deposition (minimum 50um) technologies. Includes BGBM (Back Grinding Back Metal), RDL, ENIG, Taiko grinding, and MOSFET process technologiesBack-endProcess:Servicesincludinglaminating,backgrinding,lasermarkingandgrooving,SAW,plasma,PostAVI,UVirradiation,pickandplace,AVI,visualinspection,andpacking.Waferthinning(minimum30um)andbacksidemetaldeposition(minimum50um)technologies.IncludesBGBM(BackGrindingBackMetal),RDL,ENIG,Taikogrinding,andMOSFETprocesstechnologies
WLCSP (Wafer Level Chip Scale Package): Technology for packaging and testing integrated circuits at the wafer level. A true chip-scale packaging technology with increasing demand in the mobile market due to excellent electrical properties and price competitiveness. Providing various layers of WLCSP solutions from two to six layers. Applicable to PMIC, RF & BB SoC, Transceiver, AOC, and Sensors. Process capabilities include 8-inch and 12-inch wafer support, ball pitch 0.3-0.5mm, and RDL width/space minimum 12/12umWLCSP(WaferLevelChipScalePackage):Technologyforpackagingandtestingintegratedcircuitsatthewaferlevel.Atruechip-scalepackagingtechnologywithincreasingdemandinthemobilemarketduetoexcellentelectricalpropertiesandpricecompetitiveness.ProvidingvariouslayersofWLCSPsolutionsfromtwotosixlayers.ApplicabletoPMIC,RF&BBSoC,Transceiver,AOC,andSensors.Processcapabilitiesinclude8-inchand12-inchwafersupport,ballpitch0.3-0.5mm,andRDLwidth/spaceminimum12/12um
AI Semiconductor Packaging: Development and mass production of Fan-in Wafer Level Package (FI-WLP) and Fan-out Wafer Level Package (FO-WLP) technologies. Providing low-power, high-efficiency AI semiconductor package solutions specialized for on-device AI. Aiming to develop next-generation packaging technologies such as 2.xD and 3D Fan-Out WLPAISemiconductorPackaging:DevelopmentandmassproductionofFan-inWaferLevelPackage(FI-WLP)andFan-outWaferLevelPackage(FO-WLP)technologies.Providinglow-power,high-efficiencyAIsemiconductorpackagesolutionsspecializedforon-deviceAI.Aimingtodevelopnext-generationpackagingtechnologiessuchas2.xDand3DFan-OutWLP
Core AdvantagesCoreAdvantages
Pioneering Flip-Chip Wafer Bumping Technology: Status as the first company in Korea to establish full production facilities for flip-chip wafer bumping in 2000. Continuous expansion of technology from Gold bumping to Solder bumping, Cu pillar bumping, and WLCSP.PioneeringFlip-ChipWaferBumpingTechnology:StatusasthefirstcompanyinKoreatoestablishfullproductionfacilitiesforflip-chipwaferbumpingin2000.ContinuousexpansionoftechnologyfromGoldbumpingtoSolderbumping,Cupillarbumping,andWLCSP.
Comprehensive OSAT Service Provider: Offering a full range of semiconductor back-end services including bumping, probe test, back-end processes, and WLCSP. Establishment of an integrated system capable of meeting diverse customer requirements.ComprehensiveOSATServiceProvider:Offeringafullrangeofsemiconductorback-endservicesincludingbumping,probetest,back-endprocesses,andWLCSP.Establishmentofanintegratedsystemcapableofmeetingdiversecustomerrequirements.
Advanced Packaging Technology and Business Diversification: Strategic expansion into AI semiconductor packaging (FIWLP, FOWLP) and power semiconductor sectors, moving beyond its traditional DDI-centric business model. Securing future growth engines by entering high-value-added markets.AdvancedPackagingTechnologyandBusinessDiversification:StrategicexpansionintoAIsemiconductorpackaging(FIWLP,FOWLP)andpowersemiconductorsectors,movingbeyonditstraditionalDDI-centricbusinessmodel.Securingfuturegrowthenginesbyenteringhigh-value-addedmarkets.
Robust Quality and Environmental Management Systems: Acquisition of numerous international certifications including ISO 9001, ISO 14001, ISO 45001, IATF 16949, IECQ QC 080000, and ANSI/ESD S20.20. Recognized as a Samsung Electronics Eco-partner and Sony Green Partner, demonstrating commitment to RoHS compliance.RobustQualityandEnvironmentalManagementSystems:AcquisitionofnumerousinternationalcertificationsincludingISO9001,ISO14001,ISO45001,IATF16949,IECQQC080000,andANSI/ESDS20.20.RecognizedasaSamsungElectronicsEco-partnerandSonyGreenPartner,demonstratingcommitmenttoRoHScompliance.
Strong Partnerships and Mass Production Experience with Leading Global Customers: Long-standing business relationships with major domestic semiconductor manufacturers like Samsung Electronics, SK Hynix, and LX Semicon. Initiating mass production for global customers such as Renesas, expanding its international market presence.StrongPartnershipsandMassProductionExperiencewithLeadingGlobalCustomers:Long-standingbusinessrelationshipswithmajordomesticsemiconductormanufacturerslikeSamsungElectronics,SKHynix,andLXSemicon.InitiatingmassproductionforglobalcustomerssuchasRenesas,expandingitsinternationalmarketpresence.
Continuous Investment in Research and Development: Undertaking various R&D projects including fine pitch bumps, double-sided plating processes, micro-bumps for Micro LED electrode formation, and next-generation millimeter-wave circuit and package technologies. Efforts to maintain competitive advantage through technological innovation.ContinuousInvestmentinResearchandDevelopment:UndertakingvariousR&Dprojectsincludingfinepitchbumps,double-sidedplatingprocesses,micro-bumpsforMicroLEDelectrodeformation,andnext-generationmillimeter-wavecircuitandpackagetechnologies.Effortstomaintaincompetitiveadvantagethroughtechnologicalinnovation.
Target IndustriesTargetIndustries
Consumer Electronics and Mobile Device Industry: Application in Display Driver ICs (DDI), Image Sensors (CIS), and Power Management ICs (PMIC) for various electronic devices such as TVs, monitors, mobile phones, and tablet PCs.ConsumerElectronicsandMobileDeviceIndustry:ApplicationinDisplayDriverICs(DDI),ImageSensors(CIS),andPowerManagementICs(PMIC)forvariouselectronicdevicessuchasTVs,monitors,mobilephones,andtabletPCs.
Automotive Industry: Meeting automotive semiconductor quality management system requirements through IATF 16949 certification. Strengthening competitiveness and market entry in the automotive semiconductor market. Providing automotive and industrial semiconductor packaging services through collaboration with Renesas.AutomotiveIndustry:MeetingautomotivesemiconductorqualitymanagementsystemrequirementsthroughIATF16949certification.Strengtheningcompetitivenessandmarketentryintheautomotivesemiconductormarket.ProvidingautomotiveandindustrialsemiconductorpackagingservicesthroughcollaborationwithRenesas.
AI and Data Center Industry: Providing packaging services for power management chips in AI data centers and for AI semiconductors used in smart devices, autonomous vehicles, home appliances, robots, and cameras for on-device AI implementation.AIandDataCenterIndustry:ProvidingpackagingservicesforpowermanagementchipsinAIdatacentersandforAIsemiconductorsusedinsmartdevices,autonomousvehicles,homeappliances,robots,andcamerasforon-deviceAIimplementation.
Communication Industry: Strengthening its presence in the communication semiconductor market through advanced packaging technologies like Fan-out Wafer Level Package (FO-WLP).CommunicationIndustry:StrengtheningitspresenceinthecommunicationsemiconductormarketthroughadvancedpackagingtechnologieslikeFan-outWaferLevelPackage(FO-WLP).
Memory Semiconductor Industry: Pursuing business expansion into memory semiconductor packaging, responding to the potential outsourcing of general DRAM packaging due to increased HBM (High Bandwidth Memory) investment.MemorySemiconductorIndustry:Pursuingbusinessexpansionintomemorysemiconductorpackaging,respondingtothepotentialoutsourcingofgeneralDRAMpackagingduetoincreasedHBM(HighBandwidthMemory)investment.
Major MarketsMajorMarkets
South Korea, China, Taiwan, Singapore, JapanSouthKorea,China,Taiwan,Singapore,Japan
United StatesUnitedStates
Certifications/PatentsCertifications/Patents
ISO 9001:2015 (Quality Management System).ISO9001:2015(QualityManagementSystem).
ISO 14001:2015 (Environmental Management System).ISO14001:2015(EnvironmentalManagementSystem).
ISO 45001:2018 (Occupational Health & Safety Management System).ISO45001:2018(OccupationalHealth&SafetyManagementSystem).
Possession of over 30 patents, including methods for manufacturing flip-chip bumps for semiconductor packages, image sensor packages using flip-chip techniques and their manufacturing methods, probe cards for semiconductor chip testers and testing methods, and bump structures for semiconductor devices and their manufacturing methods.Possessionofover30patents,includingmethodsformanufacturingflip-chipbumpsforsemiconductorpackages,imagesensorpackagesusingflip-chiptechniquesandtheirmanufacturingmethods,probecardsforsemiconductorchiptestersandtestingmethods,andbumpstructuresforsemiconductordevicesandtheirmanufacturingmethods.
Introduction
Location
138 Cheongbuksandan-ro, Cheongbuk-eup, Pyeongtaek, Gyeonggi-do, South Korea
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Information
138 Cheongbuksandan-ro, Cheongbuk-eup, Pyeongtaek, Gyeonggi-do, South Korea